DM-KIT-SSK for BF533母板原理图

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D

D

A[19:1]

EA 5V J2 2 4 6 BF_A1 8 BF_A3 10 BF_A5 12 BF_A7 14 BF_A9 16 BF_A11 18 BF_A13 20 BF_A15 22 BF_A17 24 BF_A19 26 28 30 32 34 36 38 40 BF_D1 42 BF_D3 44 BF_D5 46 BF_D7 48 BF_D9 50 BF_D11 52 BF_D13 BF_D15 54 56 58 60 62 64 66 68 70 BF_PPI0_D072 BF_PPI0_D174 76 78 80 82 84 86 88 90 1 3 5 7 BF_A2 9 BF_A4 11 BF_A6 13 BF_A8 15 BF_A10 17 BF_A12 19 BF_A14 21 BF_A16 23 BF_A18 25 27 29 31 33 35 37 39 BF_D0 41 BF_D2 43 BF_D4 45 BF_D6 47 BF_D8 49 BF_D10 51 BF_D12 BF_D14 53 55 57 59 61 63 65 67 69 71 73 BF_PPI0_D2 75 BF_PPI0_D3 77 79 81 83 85 87 89 R14 0 EXP_PPI0_CLK GND PPI0_D0 PPI0_D1 PPI0_D2 PPI0_D3 8 7 6 5 RP1 1 2 3 4 BF_PPI0_D0 BF_PPI0_D1 BF_PPI0_D2 BF_PPI0_D3 0*4 PPI0_D7 PPI0_D6 PPI0_D5 PPI0_D4 8 7 6 5 RP2 1 2 3 4 BF_PPI0_D7 BF_PPI0_D6 BF_PPI0_D5 BF_PPI0_D4 0*4 2 3

BF_3V3 BF_3V35V BF561_SYNC3 J3 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 PF3 57 PF1 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 R15 0 GND J4 UART_TX PA1_B PA3_B PA5_B PA7_B PA7_A PB7_A 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 UART_RX PA0_B PA2_B PA4_B PA6_B PA6_A PB6_A

C

B

2 4 6 8 10 MOSI MOSI 12 MISO MISO 14 16 18 20 22 24 TMR2 PPI0_VSYNC TMR2 TMR0 26 TMR0 28 DT1SEC 30 DT1PRI TFS1 32 34 TSCLK1 DT0SEC 36 DT0PRI 38 TFS0 40 TSCLK0 42 44 PF14 BF_PPI0_D5 46 PF12 BF_PPI0_D7 PF10 PPI0_D9 48 PPI0_D1150 PF8 PPI0_D1352 PF6 PPI0_D1554 PF4 BF533_SPISS PF2 56 BF533_SPISS PF0 I2C_SCL 58 I2C_SCL 60 BF_ABE3 ABE2 62 64 ABE1 ABE0 66 BF_AOE 68 BF_AWE 70 EXP_PPI0_CLK 72/SMS 74 C1 76 78 80 GND/SRAS 82 22pF SA10 84/SWE 86 88 90

SPI_SCLK

UART_TX SPI_SCLK PA1_B PA3_B PA5_B PA7_B PA7_A PB7_A

UART_RX PA0_B PA2_B PA4_B PA6_B PA6_A PB6_A

ST GND 4 5

C

BF561_SYNC3 PPI0_HSYNC TMR1 TMR1 DR1SEC DR1PRI RFS1 RSCLK1 DR0SEC DR0PRI RFS0 RSCLK0 BF_PPI0_D4 PF15 BF_PPI0_D6 PF13 PPI0_D8 PF11 PPI0_D10 PF9 PPI0_D12 PF7 BF533_INT PPI0_D14 PF5 I2C_SDA BF_AMS3/AMS2/AMS1/AMS0 ARDY BF_ARE

/RESET

/RESET

BF533_INT

I2C_SDA

D SCKE/SCAS CLK_OUT_EXP2

B

/BR/BG/BGH

IM GND PPI0_D[15:0]

D[15:0]

A

A

A

Title Size

BF533EduKit_Extender Revision V1.0 16

Number

A3

2

Date: File:

12-Jun-2007 Sheet of D:\产品化方案\白金版SSK533\statekit定板最终修改图.ddb Drawn By: 7 8

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